Parameter identification circuit, method and power supply system applying the same

ABSTRACT

A parameter identification circuit for a digital power converter having an inductor and a capacitor, can include: an inductor parameter circuit that receives an inductor current of the inductor, a capacitor voltage of the capacitor, a duty cycle in a start-up stage, and a predetermined inductor current, where the inductor parameter circuit obtains an inductor parameter according to an integrated value of the capacitor voltage, an integrated value of the duty cycle in the start-up stage, and the predetermined inductor current, when the inductor current rises to a level of the predetermined inductor current; and a capacitor parameter circuit that receives the inductor current, the capacitor voltage, and a predetermined capacitor voltage, where the capacitor parameter circuit obtains a capacitor parameter according to an integrated value of the inductor current and the predetermined capacitor voltage when the capacitor voltage rises to a level of the predetermined capacitor voltage.

RELATED APPLICATIONS

This application claims the benefit of Chinese Patent Application No. 201610847952.6, filed on Sep. 23, 2016, which is incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

The present invention generally relates to the field of power electronics, and more particularly to parameter identification circuitry, methods, and associated power supply systems.

BACKGROUND

As shown in FIG. 1, parameter identification for a digital power converter may operate in a condition whereby the power converter is in an open-loop. By inputting the disturbance signal, collecting the inductance value, capacitance value, and an output voltage, the module parameters of the digital regulator can be obtained through a certain algorithm. However, because the power converter operates in an open-loop state, it may be unable to output a stable voltage that satisfies load requirements during the parameter identification process.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic block diagram of an example digital power converter.

FIG. 2 is a schematic block diagram of an example parameter identification circuit, in accordance with embodiments of the present invention.

FIG. 3 is a waveform diagram of example operation of a parameter identification circuit, in accordance with embodiments of the present invention.

DETAILED DESCRIPTION

Reference may now be made in detail to particular embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention may be described in conjunction with the preferred embodiments, it may be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents that may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it may be readily apparent to one skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, processes, components, structures, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present invention.

Digital-controlled power converters facilitate configuring the parameters of control circuits according to the parameters of the inductor and capacitor of the power converter. In particular embodiments, parameter identification can identify inductor and capacitor parameters during a start-up state of the system without introducing any disturbance signals. This is in contrast to performing parameter identification when the system is in the stable state whereby the power converter operates in an open-loop mode to provide a stable output voltage for subsequent circuitry. In addition, particular embodiments can adaptively generate parameters for digital regulators with different inductor and capacitor parameters, such that the system can set the cut-off frequency, the phase margin, and the amplitude margin.

In one embodiment, a parameter identification circuit for a digital power converter having an inductor and a capacitor, can include: (i) an inductor parameter circuit configured to receive an inductor current of the inductor, a capacitor voltage of the capacitor, a duty cycle in a start-up stage, and a predetermined inductor current, where the inductor parameter circuit is configured to obtain an inductor parameter according to an integrated value of the capacitor voltage, an integrated value of the duty cycle in the start-up stage, and the predetermined inductor current, when the inductor current rises to a level of the predetermined inductor current; and (ii) a capacitor parameter circuit configured to receive the inductor current, the capacitor voltage, and a predetermined capacitor voltage, where the capacitor parameter circuit is configured to obtain a capacitor parameter according to an integrated value of the inductor current and the predetermined capacitor voltage when the capacitor voltage rises to a level of the predetermined capacitor voltage.

Referring now to FIG. 2, shown is a schematic block diagram of an example parameter identification circuit, in accordance with embodiments of the present invention. In this example, the parameter identification circuit may be applied in a digital power converter, which can include a power stage circuit and a control circuit. In this particular example, the power stage circuit may have a Buck topology, which can include inductor L, capacitor C, and switches Q1 and Q2. The control circuit can include parameter identification circuit 1, parameter identification circuit, 2 and digital regulator 3.

Parameter identification circuit 1 can obtain an inductor parameter (e.g., an inductance value) of inductor L, and a capacitor parameter (e.g., a capacitance value) of capacitor C in the power stage circuit. Parameter calculation circuit 2 can calculate the parameters of the model in digital regulator 3 according to the inductor parameter and the capacitor parameter. Digital regulator 3 can generate control signals for switches Q1 and Q2 according to the parameters calculated by parameter calculation circuit 2, such that the output voltage of the power converter can satisfy various application requirements.

Parameter identification circuit 1 can include inductor parameter circuit 11 and capacitor parameter circuit 12. Parameter identification circuit 1 can calculate capacitance value C and inductance value L according to a capacitor voltage, an inductor current, and duty cycle (e.g., of the switching regulator) in a start-up stage. The subsequent circuit can calculate the conjugate pole frequency of the power converter according to capacitance value C and inductance value L. Thus, the digital regulator can adaptively generate parameters under the conditions of different inductor and capacitor parameters, such that the system can set the cut-off frequency, the phase margin, and the amplitude margin.

For example, the inductor parameter can be calculated based on the following formula (1):

$\begin{matrix} {L = \frac{{\int_{0}^{t}{{D \cdot V_{i\; n}}{dt}}} - {\int_{0}^{t}{V_{C}{dt}}}}{I_{ref}}} & (1) \end{matrix}$

Predetermined inductor current I_(ref) can be set as smaller than a maximum current value that the power converter can withstand.

In one embodiment, a method of identifying parameters of a digital power converter having an inductor and a capacitor, can include: (i) setting a predetermined inductor current and a predetermined capacitor voltage; (ii) obtaining an inductor current of the inductor, a capacitor voltage of the capacitor, and a duty cycle in a start-up stage of the digital power converter; (iii) obtaining an inductor parameter according to an integrated value of the capacitor voltage, an integrated value of the duty cycle in the start-up stage, and the predetermined inductor current, when the inductor current rises to a level of the predetermined inductor current; and (iv) obtaining a capacitor parameter according to an integrated value of the inductor current and the predetermined capacitor voltage when the capacitor voltage rises to a level of the predetermined capacitor voltage.

Referring now to FIG. 3, shown is a waveform diagram of example operation of a parameter identification circuit, in accordance with embodiments of the present invention. At time t₀, the power converter may initiate a soft start-up stage, and capacitor voltage V_(C) and duty cycle D in the start-up stage may be integrated. At time t₁, when inductor current i_(L) reaches a level of predetermined inductor current I_(ref), the integrating operation is completed. Then, a product value may be obtained by multiplying the integrated value of the duty cycle in the start-up stage by input voltage V_(in). A difference value can be obtained by subtracting the integrated value of the capacitor voltage from the product value. Inductance value L can be obtained by dividing the difference value by predetermined inductor current I_(ref).

Referring also to FIG. 2, inductor parameter circuit 11 can receive inductor current i_(L) of inductor L, capacitor voltage V_(C) of the capacitor, the duty cycle in the start-up stage, and predetermined inductor current I_(ref). When inductor current i_(L) reaches a level of predetermined inductor current I_(ref), the inductor parameter can be obtained according to the integrated value of the capacitor voltage, the integrated value of the duty cycle in the start-up stage, and predetermined inductor current I_(ref).

Inductor parameter circuit 11 can include comparator 111 that receives inductor current i_(L) and predetermined inductor current I_(ref), and may generate comparison signal Vcmp1. Inductor current i_(L) may be a real/direct inductor current, or a sampling value that represents the inductor current. In this particular example, comparator 111 may have a non-inverting input terminal that receives predetermined inductor current I_(ref), and an inverting input terminal that receives inductor current i_(L). When inductor current i_(L) is smaller/less than predetermined inductor current I_(ref), comparison signal Vcmp1 can be high. When inductor current i_(L) reaches a level of predetermined inductor current I_(ref), comparison signal Vcmp1 can go low.

Integrator 112 can receive comparison signal Vcmp1 and duty cycle D in the start-up stage, and may perform an integrating operation on duty cycle D in the start-up stage when comparison signal Vcmp1 is at high level. When inductor current i_(L) is smaller than predetermined inductor current I_(ref), the integrated value of duty cycle D in the start-up stage can be provided when comparison signal Vcmp1 goes low. Gain circuit 116 can be provided for multiplying the integrated value of duty cycle D in the start-up stage by input voltage V_(in). Integrator 113 can receive comparison signal Vcmp1 and capacitor voltage V_(C), and may perform an integrating operation on capacitor voltage V_(C) when comparison signal Vcmp1 is high. When inductor current i_(L) is smaller/less than predetermined inductor current I_(ref), the integrated value of the capacitor voltage may be provided when comparison signal Vcmp1 goes low.

Adder 114 can receive a product value of the integrated value of the duty cycle in the start-up stage and the input voltage, and the integrated value of the capacitor voltage, and may generate a difference value of the product value and the integrated value of the capacitor voltage by adding the product value with a negated value of the integrated value of the capacitor voltage. Divider 115 can receive the difference value of the product value and the integrated value of the capacitor voltage, and predetermined inductor current I_(ref), and may generate inductor parameter L by performing a division operation on the difference value and inductor current I_(ref).

For example, the capacitor parameter can be calculated based on the following formula (2):

$\begin{matrix} {C = \frac{\int_{0}^{t}{i_{L}{dt}}}{V_{ref}}} & (2) \end{matrix}$

Predetermined capacitor voltage V_(ref), which may be smaller than the under voltage lock out (UVLO) voltage of the subsequent circuit, can be set in advance. In addition, the subsequent circuit may be considered as no-load. As shown in FIG. 3, at time t₀, the power converter can initiate a soft start-up stage, and inductor current i_(L) may be integrated. At time t₂, when capacitor voltage Vc reaches a level of predetermined capacitor voltage V_(ref), the integrating operation is completed. The integrated value of inductor current i_(L) may be divided by predetermined capacitor voltage V_(ref), in order to obtain capacitance value C.

Capacitor parameter circuit 12 can receive inductor current i_(L), capacitor voltage V_(C), and predetermined capacitor voltage V_(ref). When capacitor voltage V_(C) rises to a level of predetermined capacitor voltage V_(ref), capacitor parameter C can be obtained according to the integrated value of the inductor current and predetermined capacitor voltage V_(ref). Capacitor parameter circuit 12 can include comparator 121 that receives capacitor voltage V_(C) and predetermined capacitor voltage V_(ref), and may generate comparison signal Vcmp2. Similarly, capacitor voltage V_(C) may be a real/direct capacitor voltage, or a sampling value that represents the capacitor voltage. In this particular example, comparator 121 may have a non-inverting input terminal that receives predetermined capacitor voltage V_(ref), and an inverting input terminal that receives capacitor voltage V_(C). When capacitor voltage V_(C) is smaller/less than predetermined capacitor voltage V_(ref), comparison signal Vcmp2 can be high. When capacitor voltage V_(C) reaches a level of predetermined capacitor voltage V_(ref), comparison signal Vcmp2 can go low.

Integrator 122 can receive comparison signal Vcmp2 and inductor current i_(L), and may perform an integrating operation on inductor current i_(L) when comparison signal Vcmp2 is high. When capacitor voltage V_(C) is smaller/less than predetermined capacitor voltage V_(ref), an integrated value of inductor current i_(L) can be provided when comparison signal Vcmp2 goes low. Divider 123 can receive the integrated value of the inductor current and predetermined capacitor voltage V_(ref), and may generate capacitor parameter C by performing a division operation on the integrated value of the inductor current and predetermined capacitor voltage V_(ref).

In particular embodiments, inductor and capacitor parameters can be identified during the start-up of the system, instead of in a stable operation state. Thus, the power converter needing to operate in an open-loop mode and providing a required output voltage for a subsequent circuit with signal injection while identifying such parameters can be substantially avoided. In addition, particular embodiments can adaptively generate parameters for digital regulators with different inductor and capacitor parameters. In this way, the system can satisfy requirements of setting the cut-off frequency, the phase margin, and the amplitude margin.

The embodiments were chosen and described in order to best explain the principles of the invention and its practical applications, to thereby enable others skilled in the art to best utilize the invention and various embodiments with modifications as are suited to particular use(s) contemplated. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents. 

1.-10. (canceled)
 11. A parameter identification circuit for a digital power converter having an inductor and a capacitor, wherein said parameter identification circuit adaptively generates an inductor parameter and a capacitor parameter of said digital power converter when said digital power converter is in a start-up stage and outside of a steady stage, wherein the stability of an output voltage of said digital power converter is not affected by said generation of said inductor parameter and said capacitor parameter.
 12. The parameter identification circuit of claim 11, wherein said parameter identification circuit is configured to generate said inductor parameter and said capacitor parameter in accordance with a capacitor voltage, an inductor current, and a duty cycle in said start-up stage.
 13. The parameter identification circuit of claim 12, wherein said parameter identification circuit comprises: a) an inductor parameter circuit coupled to said inductor, and being configured to obtain said inductor parameter according to an integrated value of said capacitor voltage, an integrated value of said duty cycle in said start-up stage, and a predetermined inductor current, prior to said inductor current rising to a level of said predetermined inductor current; and b) a capacitor parameter circuit configured to obtain said capacitor parameter according to an integrated value of said inductor current and a predetermined capacitor voltage prior to said capacitor voltage rising to a level of said predetermined capacitor voltage.
 14. The parameter identification circuit of claim 12, wherein said inductor current, said capacitor voltage, and said duty cycle in said start-up stage are integrated when said digital power converter is enabled.
 15. The parameter identification circuit of claim 13, wherein said inductor parameter circuit is configured to obtain a product value by multiplying said integrated value of said duty cycle in said start-up stage by an input voltage, and to obtain a difference value by subtracting said integrated value of said capacitor voltage from said product value, wherein said inductor parameter is obtained by dividing said difference value by said predetermined inductor current.
 16. The parameter identification circuit of claim 13, wherein said inductor parameter circuit comprises: a) a first comparator configured to receive said inductor current and said predetermined inductor current, and to generate a first comparison signal; b) a first integrator configured to receive said first comparison signal and said duty cycle in said start-up stage, and to perform an integrating operation on said duty cycle in said start-up stage according to a level of said first comparison signal; and c) a second integrator configured to receive said first comparison signal and said capacitor voltage, and to perform an integral action on said capacitor voltage according to said level of said first comparison signal.
 17. The parameter identification circuit of claim 16, wherein said inductor parameter circuit further comprises: a) an adder configured to receive said product value of said integrated value of said duty cycle in said start-up stage and said input voltage, and said integrated value of said capacitor voltage, and to generate said difference value by performing a subtraction operation; and b) a divider configured to receive said difference value and said predetermined inductor current, and to generate said inductor parameter by performing a division operation.
 18. The parameter identification circuit of claim 12, wherein said capacitor parameter comprises a quotient of said integrated value of said inductor current and a predetermined capacitor voltage.
 19. The parameter identification circuit of claim 13, wherein said capacitor parameter circuit comprises: a) a second comparator configured to receive said capacitor voltage and said predetermined capacitor voltage, and to generate a second comparison signal; b) a third integrator configured to receive said second comparison signal and said inductor current, and to perform an integrating operation on said inductor current according to a level of said second comparison signal; and c) a divider configured to receive said integrated value of said inductor current and said predetermined capacitor voltage, and to generate said capacitor parameter by performing a division operation.
 20. A method of identifying parameters of a digital power converter having an inductor and a capacitor, the method comprising: a) obtaining an inductor parameter when said digital power converter is in a start-up stage and outside of a steady stage; b) obtaining a capacitor parameter when said digital power converter is in said start-up stage and outside of said steady stage; and c) wherein the stability of an output voltage of said digital power converter is not affected by said obtaining said inductor parameter and said obtaining said capacitor parameter.
 21. The method of claim 20, wherein said parameter identification circuit generates said inductor parameter and said capacitor parameter in accordance with a capacitor voltage, an inductor current, and a duty cycle in said start-up stage.
 22. The method of claim 20, further comprising: a) obtaining an inductor parameter according to an integrated value of said capacitor voltage, an integrated value of said duty cycle in said start-up stage, and a predetermined inductor current, prior to said inductor current rising to a level of said predetermined inductor current; and b) obtaining a capacitor parameter according to an integrated value of said inductor current and a predetermined capacitor voltage prior to said capacitor voltage rising to a level of said predetermined capacitor voltage.
 23. The method of claim 22, further comprising: a) obtaining a product value by multiplying said integrated value of said duty cycle in said start-up stage by an input voltage; b) obtaining a difference value by subtracting said integrated value of said capacitor voltage from said product value; and c) generating said inductor parameter by dividing said difference value by said predetermined inductor current.
 24. The method of claim 22, wherein said capacitor parameter comprises a quotient of said integrated value of said inductor current and said predetermined capacitor voltage.
 25. A power supply system, comprising: a) a power stage circuit configured to convert an input voltage to an output signal, wherein said power stage circuit comprises an inductor, a capacitor, and a switching transistor; b) a parameter identification circuit configured to generate an inductor parameter of said inductor, and a capacitor parameter of said capacitor, when said power supply system is in a start-up state and outside of a steady stage, wherein the stability of said output voltage is not affected by said generation of said inductor parameter and said capacitor parameter; and c) a parameter calculation circuit configured to calculate control parameters of a digital regulator according to said inductor parameter and said capacitor parameter, wherein said digital regulator is configured to generate a control signal for said switching transistor in accordance with said control parameters.
 26. The power supply system of claim 25, wherein said parameter identification circuit is configured to: a) generate said inductor parameter in accordance with an integral calculation of a capacitor voltage, an inductor current and a duty cycle in said start-up state; and b) generate said capacitor parameter in accordance with an integral calculation of an inductor current in said start-up state.
 27. The power supply system of claim 25, wherein said control parameters are determined to satisfy a cutoff frequency and a phase margin of said power supply system. 